1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to data processing systems having one or more secure modes of operation and one or more non-secure modes of operation and that utilise secure mode page table data for managing accesses to memory when operating in a secure mode.
2. Description of the Prior Art
It is known to provide data processing systems, such as data processing systems incorporating the TrustZone architecture of ARM Limited, Cambridge, England, that have one or more secure modes of operation and one or more non-secure modes of operation. The memory (memory address space) within such systems is typically provided with one or more secure regions that are accessible in a secure mode of operation and are inaccessible in a non-secure mode of operation together with one or more non-secure regions that are accessible both in a secure mode of operation and in a non-secure mode of operation. In this way, sensitive data, such as encryption keys, financial data etc, may be stored within the secure regions and only accessible to trusted/secure applications which execute in a secure mode of operation. Such data processing systems also support non-secure applications which execute in a non-secure mode, but which only have access to the non-secure regions of memory. Such systems are, for example, useful in digital rights management in which highly sensitive and secret information such as encryption keys may be secured within a secure region of memory and only accessible to secure applications executing in a secure mode while the system also supports non-secure applications, such as media players or unrelated applications, that execute in a non-secure mode and utilise the non-secure regions of memory without needing themselves directly to access the secure/secret data held within the secure regions of memory.
In order to manage access to the secure regions of memory when operating in the one or more secure modes, it is known to provide secure mode page table data which is used by memory management circuitry, such as a memory management unit or a memory protection unit, to control/manage access to the memory. A memory management unit may, for example, be responsible for translating virtual addresses generated in a secure mode into physical addresses. The regions within the memory to be accessed in the secure mode may include both secure regions and non-secure regions. A problem that may arise is that secure mode page table data used to manage accesses to secure regions of memory may be subject to unauthorised alteration such that, for example, an application in a secure mode accesses a non-secure region of memory rather than a secure region of memory as was initially intended. This can compromise the security of the system.
In order to deal with this problem it is possible to store all of the secure mode page table data within secure regions of the memory. In this way, the secure mode page table data can be protected from unauthorised alteration seeking to circumvent the security of the system. However, a problem with this approach is that the size of the secure mode page table data is large and consumes a disadvantageously large amount of memory capacity of the one or more secure regions of the memory. Thus, the secure regions of memory may be required to have a large storage capacity just to store the secure mode page table data even though the amount of secure data itself, e.g. encryption keys, financial data, secure program instruction code etc, is relatively small in quantity.